The attenuator synthesis application can be used to design various types of passive attenuators. microstrips, coaxial cables).Ī component library manager gives access to models for real life devices (e.g. The transmission line calculator can be used to design and analyze different types of transmission lines (e.g. SPICE netlists, or Touchstone files).Ī filter synthesis application can help design various types of filters. It is handy to edit files related to certain components (e.g. The GUI includes a text editor which can display netlists and simulation logging information. It reads a netlist file augmented with commands, performs simulations, and finally produces a dataset file. The analog simulator, gnucsator, is a command line program which is run by the GUI in order to simulate the schematic which you previously setup. The GUI is used to create schematics, setup simulations, display simulation results, writing VHDL code, etc. Qucs consists of several standalone programs interacting with each other through a GUI.
Other features include the transmission line calculator, Filter synthesis, Smith-Chart tool for power and noise matching, Attenuator design synthesis, Device model and subcircuit library manager, Optimizer for analog designs, the Verilog-A interface, Support for multiple languages ( GUI and internal help system), Subcircuit (including parameters) hierarchy, Powerful data post-processing possible using equations and symbolically defined nonlinear and linear devices. The documentation offers many useful tutorials (WorkBook), reports (ReportBook) and a technical description of the simulator. Simulation data can be represented in various types of diagrams, including Smith-Chart, Cartesian, Tabular, Polar, Smith-Polar combination, 3D-Cartesian, Locus Curve, Timing Diagram and Truth Table. Qucs has a graphical interface for schematic capture. Analysis types include S-parameter (including noise), AC (including noise), DC, Transient Analysis, Harmonic Balance (not yet finished), Digital simulation (VHDL and Verilog-HDL) and Parameter sweeps.
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